Integrated circuit (IC) manufacturers increasingly face difficulties with scaling and insulation between components with ever decreasing feature sizes. Even though packing transistors closer is important to the concept of increasing IC speed and decreasing size, they must still be electrically separated from each other. One method of keeping transistors separate from each other is known as trench isolation. Trench isolation is the practice of creating trenches in the substrate in order to separate electrical components on the chip. The trenches are typically filled with an insulator that will prevent cross-talk between transistors.
Shallow trench isolation (STI), which is becoming quite prevalent in modern IC design, uses trenches that are substantially narrower than previous isolation technology, such as LOCal Oxidation of Silicon (LOCOS). The size can vary, but a trench less than one half of a micron wide has become quite common. STI also offers smaller channel width encroachment and better planarity than technologies used in earlier IC generations.
During the deposition process and subsequent steps, however, the trench walls can be damaged. A silicon nitride liner in an STI trench has substantial stress-relieving capabilities for the sidewalls of the trench. Such liners are often used for high density ICs, such as dynamic random access memory (DRAM) chips, to protect the bulk silicon during subsequent process steps.
In order to provide good isolation properties, the trench is then typically filled with an insulator such as a form of silicon oxide. The oxide can be deposited in a number of methods, such as CVD, sputtering, or a spin-on deposition process. Spin-on insulators, or spin-on dielectrics (SOD), can be deposited evenly. Additionally, SOD materials, which often form silicon oxide after being reacted, carry less risk of voids in the resulting insulating material than other deposition processes. The SOD precursor is reacted to form silicon oxide using a high temperature oxidation process.
However, problems relating to the formation of the SOD are common and can cause significant problems for IC designers. In particular, interface problems between the SOD and the trench walls are common. Accordingly, better methods of SOD integration are needed for trenches.